1. Field of the Invention
The present invention relates to a Bi-MOS semiconductor integrated circuit in which a bipolar transistor is formed at an output stage.
2. Description of the Related Art
FIG. 1 shows the structure of part of a conventional Bi-CMOS semiconductor integrated circuit in which a signal is processed by a logic circuit comprising P-and N-channel MOSFETs and a bipolar transistor is formed at an output stage to enhance the current driving force against an output load. In FIG. 1, reference numeral 11 denotes a signal output terminal, 12 shows a P-channel MOS FET for charging the output terminal 11 to be set at a high potential, 13 indicates an NPN bipolar transistor, formed at the output stage, for charging the output terminal 11 to be set at a high potential, 14 represents a resistor for emitting surplus base charges from the bipolar transistor 13 to increase the speed at which the on-state of the bipolar transistor 13 changes to the off-state thereof, 15 indicates an N-channel MOS FET for discharging the output terminal 11 to be set at a low potential, 16 shows an NPN bipolar transistor, formed at the output stage, for discharging the output terminal to be set at a low potential, 17 denotes a resistor for emitting surplus base charges from the bipolar transistor 16 to increase the speed at which the on-state of the bipolar transistor 16 changes to the off-state thereof, 18 indicates a power supply terminal to which a high power supply voltage V.sub.cc is applied, and 19 represents a power supply terminal to which a low power supply voltage V.sub.ss is applied.
In the conventional semiconductor integrated circuit described above, the back gate of the N-channel MOSFET 15 is connected to the power supply terminal 19 for the reason that an N-channel MOSFET is usually formed on the surface region of a P-type semiconductor substrate and the lowest voltage, that is, a low power supply voltage V.sub.ss is applied to the semiconductor substrate.
The source potential of the N-channel MOSFET 15 does not always correspond to the back gate potential thereof. If the back gate potential becomes lower than the source potential, the mutual conductance gm of the MOSFET is reduced by the well-known back gate bias effect.
The mutual conductance is reduced by the back gate bias effect particularly in a transition from the off-state of the MOSFET 15 to the on-state thereof. More specifically, if the MOSFET 15 is turned on, a base current flows into the bipolar transistor 16 through the MOSFET 15 and the bipolar transistor 16 is thus turned on. When the bipolar transistor 16 starts to be turned on, a voltage drop is caused in the parasitic base resistance of the transistor 16 and thus the source potential of the MOSFET 15 becomes higher than the power supply voltage V.sub.ss. Since the back gate of the MOSFET 15 is always connected to the power supply terminal 19, the back gate potential of the MOSFET 15 is made lower than the source potential thereof by the voltage drop. The difference between the source potential and the back gate potential is considerably larger than a voltage (about 0.7 V) between the base and emitter of a common bipolar transistor. For example, the source potential of the MOSFET 15 increases up to about 2 V.
When a signal falls at the output terminal, the mutual conductance gm of the MOSFET 15 is greatly reduced, resulting in a problem wherein the base current of the bipolar transistor 16 reduces and the falling speed of the signal at the output terminal decreases.